The present invention relates to a semiconductor memory device and method of using the same, and more particularly a redundancy circuit of a semiconductor memory device having spare memory cells in which store information for substituting data of defective memory cells.
Recently, integration density and capacity of memory cells has increased in semiconductor memory devices, chip size has also increased. However, increased chip size has caused the yield of semiconductor chips to be reduced. Yields have further decreased as design rules become narrower in order to achieve a high integration density.
One of the most important ways of increasing yields is by using techniques for relieving defective cells. An Error Correction Code (hereinafter, referred to as ECC) is one of the defective cell relief techniques and utilizes a hamming code such as is generally used in digital telecommunication. Data having an error that is generated among data read from the memory cells can be substituted for the correct data using the data read from the memory cells and parity data. Defects in the memory cells and the error on data reading process can thus typically be corrected.
However, drawbacks to using an ECC (Error Correction Code), exist, such as undesirable increases in the area of the chip and certain errors still may not be corrected.
Another of the defective cell relief techniques uses spare memory cells along with the normal memory cells. In this technique, defective memory cells that exist among the normal memory cell array can be substituted with the spare memory cells when the normal memory cells are found to be defective. This redundancy technique is primarily used in DRAM (dynamic RAM), SRAM (static RAM) and PROM (programmable ROM) memory devices.
This redundancy technique has not been generally used in Mask ROMs, however, because that data in Mask ROM memory cells is stored during the time the Mask ROM device is manufactured (i.e., fabricated), prior to its being delivered to the user and/or buyer, unlike other memory devices. Such storage of the data makes it impossible to store in spare memory cells information that corresponds to that information in defective memory cells since testing that determine which cells are defective does not occur until after the fabrication process is completed. Accordingly, when redundancy is used in the Mask ROM, it is required to use spare memory cells which are separated from the normal memory cells in order to make it possible to store information after completion of the initial process. The Mask ROM spare memory cells used are those having floating gates such as are employed in PROMs and memory cells having fuses.
There is an advantage to using redundancy rather than ECC relief defect techniques because it can occupy a smaller area. However, one disadvantage is that after addresses are applied to the chip, whether the addresses designate defective memory cells must be determined. Accessing addresses of the spare memory cells thus undesirably causes the access time to be increased.
Also, page mode operation, which sequentially outputs a stream of data after once reading this stream of data which corresponds to several words in order to shorten the access time, requires using the same number of spare memory cells as number of words read in order to repair one defective memory cell. Since a Mask ROM requires the use of spare memory cells which are separated from the normal memory cells, the spare memory cells needed undesirably occupy an excessively large chip area. Also, using a redundancy technique together with an ECC technique in order to improve yield gives rise to the above-referenced difficulties and problems.